Please use this identifier to cite or link to this item: https://repositorio.uti.edu.ec//handle/123456789/3264
Title: Hardware-software co-design for efficient and scalable real-time emulation of SNNs on the edge
Authors: Oltra-Oltra, Josep
Vallejo, Bernardo
Madrenas, Jordi
Mata-Hernández, Diana
Zapata, Mireya
Sato, Shigeo
Issue Date: 2021
Publisher: Proceedings - IEEE International Symposium on Circuits and Systems. Volume 2021-May. 3rd IEEE International Symposium on Circuits and Systems, ISCAS 2021. Daegu. 22 May 2021 through 28 May 2021
Abstract: This paper introduces a novel workflow for Distributed Spiking Neural Network Architecture (DSNA). As such, the hardware implementation of Single Instruction Multiple Data (SIMD)-based Spiking Neural Network (SNN) requires the development of user-friendly and efficient toolchain in order to maximise the potential that the architecture brings. By using a novel SNN architecture, a custom designed hardware/software toolchain has been developed. The toolchain performance has been experimentally checked on a Band-Pass Filter (BPF), obtaining optimized code and dat
URI: https://ieeexplore.ieee.org/document/9401615
http://repositorio.uti.edu.ec//handle/123456789/3264
Appears in Collections:Artículos Científicos Indexados

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