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    Título : Acceleration of Evolutionary Grammar Using an MISD Architecture Based on FPGA and Petalinuxs
    Autor : Vallejo-Mancero, Bernardo
    Zapata, Mireya
    Fecha de publicación : 2021
    Editorial : Advances in Intelligent Systems and Computing. Volume 1213 AISC, Pages 510 - 517. AHFE Virtual Conferences on Software and Systems Engineering, and Artificial Intelligence and Social Computing, 2020. San Diego. 16 July 2020 through 20 July 2020
    Resumen : The evolutionary grammars are part of the optimization methods and searching for solutions based on the biological evolution postulates. The proposed technique is based on the genetic recombination’s concept and could be used to automatically generate programs in any programming language according to the specified grammar. The objective of this work is to design and evaluate a hardware acceleration solution for a Java evolutionary grammar software application, performing modifications in the data processing phase using an MISD (Multiple Instruction Single Data) architecture. The implementation is performed on a platform that integrates the programmability of an ARM processor along with the programmable logic of an FPGA with a custom Linux embedded operative system like Petalinux. The tests carried out allow determining the viability of the project, the results show that the parallelized stage is faster than the original solution, and the whole system can be implemented in a SoC.
    URI : https://link.springer.com/chapter/10.1007/978-3-030-51328-3_70
    http://repositorio.uti.edu.ec//handle/123456789/3313
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